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Journal of Low Power Electronics and Applications
Scopus
ISSN 2079-9268 · MDPI AG · 604 articles in the index
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Ni-Ion-Implantation-Assisted Ultrathin Interlayer for Cu/PI Metallization in Low-Power Electronics
Reliable Cu/polyimide (PI) metallization requires strong interfacial adhesion while minimizing the thickness of the metallic adhesion layer. In this study, Ni ion implantation was combined with physical vapor deposition to construct an ultrathin Ni interlayer on a 25 μm-thick PI substrate. Three…
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A Wideband Circularly Polarized Stacked Patch Antenna Using a DGS-Enhanced Two-Stage Coupler for Sub-6 GHz Applications
This paper presents a wideband circularly polarized (CP) stacked patch antenna for 5G Sub-6 GHz applications. A major challenge in wideband dual-feed antennas is the fabrication limit caused by standard chemical etching and mechanical milling processes for extremely narrow high-impedance microstrip…
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A 28.5 nW Analog Circuit Implementing the Pan–Tompkins Algorithm for Heart Rate Monitoring in Pacemakers Dedicated to Small Animals
This article proposes a new integrated analog implementation of the Pan–Tompkins algorithm. This algorithm, generally implemented in the digital domain at the cost of higher power consumption, is one of the most efficient for QRS detection in electrocardiographic signals. This circuit has been…
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A Priority-Aware Piggybacking-Based Energy-Efficient MAC Protocol Using Bit Mapping
Battery-powered IoT sensor nodes require energy-efficient Medium Access Control (MAC) protocols to extend network lifetime while supporting priority-sensitive traffic. This paper proposes a Priority-Aware Packet Aggregation/Piggybacking-Based (Priority + Packet Aggregation) Hybrid Energy-Efficient…
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FPGA Implementation of a Low-Power VLSI Architecture for Medical Image Scaling
This paper presents an FPGA (Field-Programmable Gate Array) implementation of a low-power VLSI (Very Large-Scale Integration) architecture for medical image scaling in portable diagnostic systems. The proposed architecture employs bilinear interpolation optimized through FSM…
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Maximizing Massive MIMO’s Energy and Spectrum Efficiency via Channel Estimation
Massive Multiple-Input Multiple-Output (MIMO) is a key enabling technology for fifth-generation (5G) and beyond wireless communication systems because of its ability to greatly enhance both spectral efficiency (SE) and energy efficiency (EE). However, maximizing these two performance metrics…
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Versat-AI: An ONNX-to-SoC Compiler for Model-Agnostic CGRA Edge Inference
Edge inference on resource-constrained embedded nodes demands accelerators that are energy-efficient and compact. This paper presents Versat-AI, an open-source compiler that accepts a standard Open Neural Network Exchange (ONNX) model and generates a complete, synthesisable RISC-V System-on-Chip…
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Hybrid Filamentary Switching in Fe2O3—Incorporated TiO2 Memristors for Memory and Neuromorphic Computing Application
Memristive devices have emerged as promising candidates for next-generation non-volatile memory and neuromorphic computing systems owing to their simple device architecture, low power consumption, and capability for analog conductance modulation. In this work, Fe2O3-incorporated TiO2 thin films…
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Low-Power IGZO TFTs with Improved Positive Bias Stability via Atomic Layer Deposition-Based H2O Treatment
In this work, a plasma-free atomic layer deposition (ALD)-based H2O post-treatment method is proposed to precisely modulate hydrogen-related (H-related) traps in indium gallium zinc oxide (IGZO) thin-film transistors (TFTs) by the number of H2O treatment cycles. Under the optimized condition, the…
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Energy-Aware Physical Unclonable Functions: From Physical Entropy Sources to MRAM-Based Low-Power Hardware Roots of Trust
Physical unclonable functions (PUFs) convert device-specific physical variations into responses for chip identity, key reconstruction, secure boot, and hardware roots of trust. This review examines the complete PUF chain from entropy generation and response digitization to stabilization…
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Morphology–Controlled Fe/Silicone Composite Dielectric Layers via Ultrasonic Needle-Induced Acoustic Streaming for Flexible Capacitive Sensors
Achieving precise microstructure control in composite dielectric layers remains a key challenge for enhancing the sensitivity and reducing the power consumption of flexible capacitive sensors. In this work, an ultrasonic needle-induced acoustic streaming strategy is proposed to regulate the spatial…
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Low Power Reconfigurable Neuromorphic Architecture by Sparsely Connected Spiking Neural Networks for Edge Applications
Recent advances in biologically inspired neural computation have sparked increasing interest in developing hardware-efficient architectures capable of emulating brain-like cognitive abilities like low power consumption and less inference latency. However, significant hardware overhead and…
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A Tunable CMOS Sine Waveform Generator for On-Chip Impedance Spectroscopy
This paper presents a low-power fully integrated sine signal generator for on-chip bioimpedance spectroscopy applications. The circuit is based on a relaxation oscillator, which generates a triangular signal, followed by a sixth-order Gm-C bandpass filter (BPF) that linearizes the waveform. Both…
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Sensorless Current Estimation in Piezoelectric Energy Harvesting Networks Using a Takagi–Sugeno Fuzzy System
This paper proposes a sensorless current estimation method for piezoelectric energy harvesting (PEH) systems using a first-order Takagi–Sugeno fuzzy system. Unlike invasive current sensing, the proposed estimator uses only non-invasive measurements: output voltage VO, its derivative V˙O, and load…
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Can Federated Learning Go Green? EcoFL: A System-Level Energy-Aware Benchmark for IoT Edge Intelligence
The proliferation of Internet of Things (IoT) devices operating at the network edge has created unprecedented demand for distributed machine learning capable of functioning under severe resource constraints. Federated learning (FL) has emerged as a promising paradigm for privacy-preserving…
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An Automated Capacity-Allocating-Based Transition Strategy Between Harmonic and Reactive Power Compensation for Multifunctional PAPF
This paper proposes a practical heuristic engineering strategy for automated capacity allocation in a multifunctional parallel active power filter (PAPF) that simultaneously provides harmonic and reactive power compensation. Unlike theoretically optimal methods, our approach prioritizes real-time…
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A Compact UWB Antenna with a Fixed WLAN Band-Notch for Low-Power Wireless Systems
This paper presents a compact, ultra-wideband (UWB) antenna designed for low-power wireless systems requiring upper WLAN (5.725–5.825 GHz) interference mitigation. The antenna integrates a tapered-slot radiator for broadband impedance matching with a dual C-shaped slot resonator on the ground plane…
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Optimizing Chaotic Behavior: Systematic Shifting and Operations for Robust 1-D Chaotic Maps
In this work, we present a systematic framework to optimize robust 1-D chaotic maps, focusing on expanding the uninterrupted chaotic region and enhancing chaotic properties throughout the entire parameter space. To achieve these objectives, we propose three distinct techniques, each involving…
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A Low-Power Mixed-Signal Differential In-Memory Matrix–Vector Computing Circuit Architecture with RISC-V Control for Edge AI
Analog in-memory computing (AIMC) has emerged as a promising approach to mitigate the Von Neumann bottleneck in matrix operations, which are common in deep learning applications. However, the practical implementation of resistive crossbar arrays is limited by challenges in signed weight…
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3D Integrated DNN Accelerators: Recent Trends and Future Prospects
The rapid growth of Deep Neural Networks (DNNs) has led to the development of application-specific DNN accelerators. Conventional 2D von Neumann architectures suffer from memory bandwidth limitations between the memory and the processing core. 3D DNN accelerators have emerged as a promising…